Computer systems use conventional input/output subsystems to allow a computer system containing one or more processors to communicate with external systems. However, there are several problems with conventional input/output subsystems.
One problem of conventional input/output subsystems is the use of interrupts. Because conventional input/output subsystems must communicate with external systems operating independently of the computer system in which they operate, some conventional input/output subsystems employ interrupts to notify the processor of the computer system when an input has arrived or when an output has been sent. When a conventional input/output subsystem receives a communication from the external system, the conventional input/output subsystem generates an interrupt to inform a processor that a communication has been received and is waiting to be serviced. If the processor provides output it may also receive an interrupt by the input/output system to let the processor know that the output has been sent. Interrupts decrease the efficiency of a conventional computer system because the computer system must save its state to handle the interrupt, then restore the state after the interrupt has been handled. Conventional computer systems used interrupts because they allowed a processor to perform other work in between handling the interrupts. Because the I/O used only a small portion of the processor's throughput, interrupts offered a more efficient mechanism for processing I/O than conventional polling techniques. However, in modern multiprocessor systems in which the I/O consumes a more significant portion of processor resources, the benefits of using interrupts can be outweighed by the overhead required.
Another problem with conventional I/O subsystems is the lack of speed of conventional I/O busses. I/O bus speeds in conventional computer systems have not kept pace with the increases in modern processor speeds, and thus, many computer systems are constrained by the speed of the I/O bus. If the computer system is operating as a server, such as a web server or a file server, the bottleneck at the I/O bus may leave the processors idle while the I/O is being sent or received.
To avoid the bottleneck of the I/O subsystem, some computer systems have employed direct memory access techniques. Direct memory access allows the I/O subsystem to access the same memory facilities being used by the one or more processors of the computer system. The processor or processors place the data to be transferred into the memory, and instruct the DMA subsystem to transfer the data to an external system. Data received by an external system is sent by the DMA subsystem to the memory. Interrupts are used to inform the processor that the DMA subsystem has received data from the external system and also to inform the processor that the data has been sent to the external system. Although the use of DMA reduces the number of interrupts, interrupts are still used with DMA subsystems. Furthermore, data transfers are made from the external system to the DMA subsystem using the I/O bus. In addition, the memory bus throughput is reduced because all data transfers require two uses of the memory bus: once to put the data into memory and once to remove it. Furthermore, DMA circuitry requires memory data bus contention control systems because both the processor and the DMA subsystem can access the memory data bus at the same time.
Another problem associated with using the memory facilities of a computer system for I/O processing is that the responses to the I/O requests in modern server systems could simply overwhelm any one memory bus. While many I/O requests such as disk I/O requests or requests for web pages are relatively small, the response to the request is often large compared to the request: it may contain an entire file or a web page. Using the memory facilities of the computer system to process I/O could overwhelm the memory bus while the response to the request is being transmitted.
Because many computer systems utilize several processors, and because certain requests for information may be distributed across several messages, it can be most efficient to provide all of the messages in a request to the same processor that handled any prior message in a request. Some I/O subsystems employ complicated interprocess communication techniques in order to route such messages to the proper processor. The overhead required for these techniques can reduce the throughput of the processors handling the messages.
What is needed is a system and method that has a data rate exceeding conventional I/O bus speeds, does not employ interrupts, will not overwhelm the memory facilities of a computer system in which it is employed, and can efficiently route messages to an appropriate processor in a multiple processor computer system.